Fasciculus:CMOS Inverter.svg
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Size of this PNG preview of this SVG file: 267 × 267 elementa imaginalia. Aliae mensurae: 240 × 240 elementa imaginalia | 480 × 480 elementa imaginalia | 768 × 768 elementa imaginalia | 1 024 × 1 024 elementa imaginalia | 2 048 × 2 048 elementa imaginalia.
Sua resolutio (fasciculus SVG, nominale 267 × 267 elementa imaginalia, magnitudo fasciculi: 808 octeti)
Summarium
| Descriptio |
English: Layout of NMOS and PMOS components in an inverter (NOT gate). Español: Disposición de componentes NMOS y PMOS en un inversor (Puerta NO). |
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| Datum | |||
| Fons | Opus proprium | ||
| Auctor | inductiveload | ||
| SVG genesis |  This circuit diagram was created with unknown tool.
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Potestas usoris
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I, the copyright holder of this work, release this work into the public domain. This applies worldwide. In some countries this may not be legally possible; if so: I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law. |
Historia fasciculi
Presso die vel tempore fasciculum videbis, sicut tunc temporis apparuit.
| Dies/Tempus | Minutio | Dimensiones | Usor | Sententia | |
|---|---|---|---|---|---|
| recentissima | 16:38, 31 Decembris 2025 | | 267 × 267 (808 octeti) | wikimediacommons>Pduive23 | path to text & other optimalisations |
Nexus ad fasciculum
Ad hunc fasciculum nectit:
